Multi-layer PCBs are usually formed from a plurality of layers of various materials. The materials are typically electrically insulating and electrically conducting, and are well known in the art. Typically, the layers are formed and various materials (e.g., circuitization) are deposited on the surface of one or more layers and/or various materials are introduced into portions of the various layers. Additionally, holes are formed through one or more of the layers. Such holes are often referred to as plated through holes (PTHs) which in turn provide electrical coupling between designated conductive layers in and on the PCB. After forming the layers, the layers may then be assembled into a multi-layer structure.
It is extremely important to know where the layers are relative to each other in the multi-layer structure. Also, it is important to know where structures in and/or on the layers are relative to structures in and/or on other layers in the multi-layer structure. For example, when forming PTHs in the multi-layer structure, it is important to know where the various layers, signal lines and other structures formed in and/or on the layers are relative to each other to ensure that the through holes are located in the correct, optimal position for successful functioning of the circuit board. Understandably, misalignment of but one of these PTHs can result in a malfunctioning final board product.
In the past, alignment, or registration, of layers of multi-layer circuit boards has been achieved through a variety of means. For example, X-rays have been used to detect the placement of various features in and/or on layers of multi-layer circuit boards. Additionally, physical means have been utilized, such as drilling holes in each layer of a multi-layer circuit board and then stacking the circuit boards on a pin. Additionally, indentations have been formed in the sides of circuit board layers to align the layers. Examples of various methods of measuring PCB layer alignment are described in the following U.S. Letters Patents:
4,510,446Braun et al5,369,491Schneider5,377,404Berg6,232,559 B1Janecek
The present invention represents an improved method of testing multi-layered PCBs to be assured that the spacings (e.g., clearance holes and signal to PTH) in designated patterns of openings are precisely oriented vertically relative to one another, while assuring avoiding scrapping of tested products due to inappropriate test readings.
It is believed that such an invention will represent a significant advancement in the PCB manufacturing art.